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71M6521DE/DH/FE Data Sheet
Internal Data Memory: The lower 128 bytes contain working registers and bit-addressable memory. The lower 32
bytes form four banks of eight registers (R0-R7). Two bits on the program memory status word (PSW) select which
bank is in use. The next 16 bytes form a block of bit-addressable memory space at bit addressees 0x00-0x7F. All of
the bytes in the lower 128 bytes are accessible through direct or indirect addressing. Table 6 shows the internal data
memory map.
Address
0xFF
0x80
Direct addressing
Special Function Registers
(SFRs)
Indirect addressing
RAM
0x7F
0x30
0x2F
0x20
0x1F
0x00
Byte-addressable area
Bit-addressable area
Register banks R0…R7
Table 6: Internal Data Memory Map
Special Function Registers (SFRs)
A map of the Special Function Registers is shown in Table 7.
Hex\Bin
Bit-address-
able
Byte-addressable
Bin/Hex
X000
X001
X010
X011
X100
X101
X110
X111
F8
F0
E8
E0
D8
D0
C8
INTBITS
B
WDI
A
WDCON
PSW
T2CON
FF
F7
EF
E7
DF
D7
CF
C0
B8
IRCON
IEN1
IP1
S0RELH
S1RELH
USR2
C7
BF
B0
A8
A0
98
90
88
80
IEN0
P2
S0CON
P1
TCON
P0
IP0
DIR2
S0BUF
DIR1
TMOD
SP
FLSHCTL
S0RELL
DIR0
IEN2
DPS
TL0
DPL
S1CON
TL1
DPH
S1BUF
ERASE
TH0
DPL1
S1RELL
TH1
DPH1
EEDATA
CKCON
WDTREL
PGADR
EECTRL
PCON
B7
AF
A7
9F
97
8F
87
Table 7: Special Function Registers Locations
Only a few addresses are occupied, the others are not implemented. SFRs specific to the 652X are shown in bold
print. Any read access to unimplemented addresses will return undefined data, while any write access will have no
effect. The registers at 0x80, 0x88, 0x90, etc., are bit-addressable, all others are byte-addressable.
Rev 3
Page: 19 of 107
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